Alexander Viehl Dissertation Examples

Context-sensitive timing simulation of binary embedded software

Authors: Sebastian OttlikFZI Research Center for Information Technology, Karlsruhe, Germany
Stefan StattelmannABB Corporate Research, Ladenburg, Germany
Alexander ViehlFZI Research Center for Information Technology, Karlsruhe, Germany
Wolfgang RosenstielUniversity of Tübingen, Tuebingen, Germany and FZI Research Center for Information Technology, Karlsruhe, Germany
Oliver BringmannUniversity of Tübingen, Tuebingen, Germany and FZI Research Center for Information Technology, Karlsruhe, Germany
2014 Article
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Published in:
· Proceeding
CASES '14 Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems
Article No. 14

New Delhi, India — October 12 - 17, 2014
ACMNew York, NY, USA ©2014
table of contents ISBN: 978-1-4503-3050-3 doi>10.1145/2656106.2656117

binary level simulationdesignembedded and cyber-physical systemshardware validationinstruction set simulationmeasurementmeasurementmetricsmodeling methodologiesperformancereal-time systemssoftware timing simulationsystem level designvirtual prototyping

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